A method of making a monolithic integrated circuit comprising at least one pair of complementary Si-gate field-effect transistors and at least one NPN type of planar bipolar transistor is described in an article by B. Hoeffinger and G. Zimmer, "New CMOS Technologies", published in "Solid State Devices", 1980, edited by J. E. Carroll, pages 114 to 117. In this method, a region for the NPN bipolar transistor and a region for the P-channel field-effect transistor are formed in one side of the surface of a p-type wafer used as a substrate, and each of these two regions is DC-isolated from the substrate by a PN junction. Following the formation of these two regions, the substrate is provided with a thick oxide layer having openings through which ions are locally implanted using a mask to adjust the threshold voltages of the transistors and the field threshold voltage between the transistors. In addition to the process steps used in conventional Si-gate CMOS technology, a further masking and implantation step is performed to implant the impuriites of the base region of the bipolar transistor. This implantation takes place through a thin oxide layer formed simultaneously with the thin oxide layers in the areas of the field-effect transistors. By two masked ion-implantation steps, first the impurities of the regions of the N-channel field-effect transistor and then the impurities of the regions of the P-channel transistor are introduced into the semiconductor surface as in conventional Si-gate CMOS technology, and the gate electrode formed by etching away the unwanted portions of an n-type electrode material layer are used as a mask. Simultaneously with the formation of the gate electrodes, the emitter electrode of the bipolar transistor is formed on the exposed surface of the base region. From this emitter electrode, the emitter region is diffused into the base region in a subsequent high-temperature process.
With regard to the bipolar transistor, this prior art method has the disadvantage of resulting in a compensated emitter, i.e., an emitter containing impurities of the base region to a considerable extent. The contradictory requirements for a low base resistance and shallow implanted layers, which are necessary to achieve high speeds, cannot be satisfied with the prior art method.
An essential disadvantage of the prior art method is, however, that the bipolar transistor requires considerably more space than the field-effect transistors. Leaving the space required for its substrate region out of account, the bipolar transistor occupies more than twice the area of a field-effect transistor, which is mainly due to the necessary adjustment tolerances. Both the adjustment of the base region in relation to the collector contact and the adjustment of the emitter region in relation to the base are critical.